R
Chapter 4
Hardware Co-Simulation
Hardware Co-Simulation Overview
System Generator provides hardware co-simulation interfaces that make it possible to
compile a System Generator diagram into an FPGA bitstream and associate this bitstream
with a new run-time hardware co-simulation block. A run-time block is a System
Generator block that serves as a proxy between the simulation environment and the
underlying FPGA hardware. When the design is simulated in Simulink, results for the
compiled portion are calculated in hardware instead of software.
Co-Simulation Communication Primitives
System Generator provides different interfaces that allow a Simulink design to
communicate with an FPGA platform during hardware co-simulation. The types of
interfaces that should be used depend on the particulars of the design. Each interface is
briefly described below.
Ports
Ports are the most common interface for communicating with FPGA co-simulation
hardware. Here the term port is used to include both System Generator Gateway blocks
and Simulink Inport/Outport blocks. See Figure 4-1
Figure 4-1: Ports
When a design that includes a port is compiled for hardware co-simulation, a
corresponding port is created in a co-simulation memory map inside the FPGA that can be
written to or read from by the PC during co-simulation. A port with an equivalent name
and data type is also included on the run-time co-simulation block. This means that each
port in the design translates into a corresponding port on the run-time co-simulation block.
In this manner, the external interface of a run-time co-simulation block is created to match
the interface of the subsystem for which it was compiled. The ordering of the ports on the
run-time co-simulation block follows these rules:
?
Simulink Inport and Outport blocks are added to a run-time co-simulation block in
order of port indexes. For example, if a Simulink Inport has an index of 1, it will be the
Video Starter Kit
UG217 (v1.5) October 26, 2006
45
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